Aurora 810
  • • Intel Tofino 2 IFP
  • • 32 ✕ 400G
  • • Intel Xeon D-2123IT CPU
  • • BMC enabled
  • • SONiC ready
  • • Programmable pipelines by P4

Netberg Aurora 810 32×400GE, Intel Tofino 2 IFP P4 Programmable Bare Metal Switch for data centers, front angled view Netberg Aurora 810 32x400GE, Intel Tofino 2 IFP data center switch, front view Netberg Aurora 810 32×400GE, Intel Tofino 2 IFP P4 Programmable Bare Metal Switch for data centers, rear angled view Netberg Aurora 810 32x400GE, Intel Tofino 2 IFP data center switch, rear view

The Aurora 810 has a 12.8T Intel Tofino 2 Intelligent Fabric Processor at its heart. It’s a programmable switch with 32 x 400GbE QSFP-DD interfaces, each supporting breaking out to four subinterfaces for high-density leaf deployment.

With quad programmable packet processing pipelines and 20 Match Action Unit stages per pipe, Aurora 810 delivers unmatched flexibility to the network. Besides high-performance switching, its Protocol-independent switch architecture (PISA) enables adjusting protocols in software, precise control over packets, deep packet inspection, unorthodox traffic management techniques, load balancing, and much more.

The Aurora 810 supports IEEE 1588-2008 PTPv2 to achieve clock accuracy in the sub-microsecond range. All of its ports are PTP-enabled for critical 5G carrier routing, media/broadcast, and BNG applications.

The Intel® Tofino™ 2 Intelligent Fabric Processor doubles its switching capacity over the first generation and provides far more packet processing resources to handle the most demanding workloads in distributed applications, virtual machine scaling, artificial intelligence, and serverless deployments.

P4 – Programming Protocol-independent Packet Processors – exists now as an independent entity to develop a rich open-source ecosystem. Unlike human languages, a programming language such as P4 can unambiguously specify the behavior of network forwarding behavior. A programmer can describe the behavior once, then compile the program to run on various platforms.


InfiniCORE’s Visibility Studio transforms the Aurora 810 into a visibility powerhouse, leveraging the power in the Tofino 2 chipset.

P4 Studio – the compilers and development tools needed to compile and debug programs to run on Tofino 2.

A ready-to-use NOS, SONiC –  a collection of networking software components required to have a fully functional L3 device, is available for data center applications.

Use cases
  • Programmable switches deliver flexibility and performance without hiking the power consumption to bring efficiency at scale.

    More efficient packet processing and customizable behavior help users to fine-tune the network and adjust protocols in software without buying new hardware. This enables scalable, automated infrastructure with high throughput, low latency, power efficiency, and lower TCO compared to traditional fixed-function ASICs.

    Intel Tofino 2 Intelligent Fabric Processor doubles the switching capacity over the first generation and brings highly consistent packet rates and forwarding latencies.
  • IEEE 1588-2008 PTPv2 support greatly benefits time-sensitive financial applications, 5G networks, broadcast streaming, and network packet brokering/orchestration NOS.
  • Precise Control over Packets

    Network Packet Brokers (NPB), Broadband Network Gateways (BNG), Load Balancers, and AI and Machine Learning apps benefit immensely from the flexible Match-Action-Pipeline architecture.
  • Real-time telemetry

    Unlock network efficiency - identify bottlenecks and debug issues, monitor and tune network I/O, and export metadata to external admin apps with the power of Tofino 2.
  • PINS: SDN extensibility added to traditional networks

    P4 Integrated Network Stack (PINS) creates a hybrid model, bringing SDN programmability to traditional networking on top of SONiC. Users can implement new functionality using SDN and incrementally migrate towards an SDN solution.
  • 32x 400GbE QSFP-DD ports in 1 RU for high-density applications
    Up to 256x 25/10G SFP28 port via break-out cables
  • 12.8T Intel Tofino BFN-T20-128Q, quad pipelines/20 MAU stages
  • 6 billion packets per second
  • Intel® Xeon® Processor D-2113IT quad core processor for application deployment
  • Up to 128GB of DDR4 memory (32GB default)
Reliable hardware platform
  • Redundant 1600W 1+1 power
  • Redundant N+1 cooling
Network OS (NOS) options
  • InfiniCORE Network Visibility Studio transforms the Aurora 610, 710, and 750 into a visibility powerhouse, leveraging the programmability in the Tofino chipset. Visibility Studio provides a full data path design environment known as the NextIO Design Environment right from the Web-based UI.
  • SONiC - a collection of networking software components required to have a fully functional L3 device. It is designed to meet the requirements of a cloud data center. It is fully open-sourced at OCP.
  • The Stratum project broadens the scope of SDN to include full lifecycle control, configuration and operations interfaces.

    Envisioned as a key software component of SDN solutions of the future, Stratum implements the latest SDN-centric northbound interfaces, including P4, P4Runtime, gNMI/OpenConfig, and gNOI. It does not embed control protocols, but instead is designed to support either an external Network OS or to work with NOS functions running on the same embedded switch.
  • Ubuntu Linux for application development.

    Tofino 2 gives network designers the power of the Protocol-Independent Switch Architecture (PISA). The PISA architecture was developed to provide powerful programmability.

    Tofino 2 is fully programmable because the forwarding logic resides in the P4 program that the network operator or switch manufacturer loads on the chip; it's not baked into the silicon. Tofino is protocol independent because the chip has no awareness of the network protocols it supports. Instead, the P4 program provides the logic for handling all supported protocols. When support for a new protocol is required, the network operator or switch manufacturer simply adds new logic to the P4 program.
MSRP Buy Tofino 2 IFP in Aurora 810 SONiC-ready switch for US$27,000
Ports 32x 400GbE QSFP-DD ports in 1 RU
Up to 256 25/10G ports via break-out cables
1x RJ-45 out-of-band (10/100/1000) management
1x mini-USB console (RS232)
1x USB
Front IO PSU status LED
System status LED
Power status LED
Performance Switching silicon: 12.8T Intel Tofino 2 Intelligent Fabric Processor BFN-T20-128Q, quad pipelines/20 MAU stages
Forwarding rate: 6Bpps
Latency: from 600 ns
Packet Buffer: 64MB
Intel® Xeon® Processor D-2123IT
128GB M.2 SSD
Management ASPEED AST2520 BMC
IPMI 2.0, shared Ethernet port
Power 1600W 1+1 RPSU 80+ Platinum:
100V~240V AC / 50~60Hz

48V DC 1600W RPSU (option)
Cooling 5 N+1 redundant fan modules
Front-to-Back airflow
Dimensions (DxWxH) 1U, 515 x 440 x 44 mm
Rail kit (optional)
Environment Operating temperature: 0~40°C
Operating humidity: 20-95% maximum relative humidity (non-condensing)
Warranty 3 year
EMC and safety CE Declaration of Conformity
Reduction of Hazardous Substances (RoHS) 6
Compatible NOS ONIE bootloader
Ubuntu 20.04 and a set of developer tools
SONiC (Software for Open Networking in the Cloud)
InfiniCORE Network Visibility Studio
Netberg SONiC SONiC.202111

Layer 2:
Link aggregation:
* LAG 802.3ad with LACP
* LACP Fallback
* IEEE 802.1Q
* Port-based
* Vlan Trunk

Layer 3:
* FRR as default routing stack
** BGP Graceful restart helper
** BGP/Neighbor-down fib-accelerate
** IPv6 Link Local and BGP Unnumbered
** Consistent ECMP (fine grain ECMP)
* Proxy ARP
* Mgmt VRF
* L3 RIF counter support
* SONiC for MPLS Dataplane

* QoS - ECN
* QoS - RDMA

* Standard Linux shell tools
* Linux application integration
* Industry standard CLI
* CLI filtering
* Telnet/SSH
* Warm Reboot
* Incremental Config (IP, LAG, Port shut/unshut)
* CoPP Config/Management
* Streaming telemetry
* sFlow
* Syslog
* Sysdump
* DHCP Relay Agent
* Fast Reload
* Critical Resource Monitoring
* MAC Aging
* gRPC
* Sensor transceiver monitoring
* Routing Stack Graceful Restart
* Port breakout
* Port Mirroring
* Everflow V2 - IPV4/IPv6 Portion 2.0
* Sub-port support
* Configurable drop counters
* HW resource monitor
* LLDP extended MIB
* SONiC to SONiC upgrade
* One Image
* MAC Aging
* MTU Setting

* ACL permit/deny
* IPv6 ACL
* Dynamic ACL Upgrade
* Egress mirroring and ACL action support
* Egress shaping (port, queue)

Data Center:
* Priority Flow Control
** Asymmetric PFC
** PFC Watermark
* Tunnel Decap
* BGP-EVPN support(type 5)
* Dynamic headroom calculation (RoCEv2)
* Dynamic policy based hashing for NVGRE/VxLAN packets
* PINS (P4 Integrated Network Stack)